Chip design AI model startup Cognichip is neither a fabless semiconductor company nor an EDA company; it’s in an entirely new segment, Cognichip Chief Product Officer Stelios Diamantidis told EE Times.

“AI is helping us rethink that entire market,” he said. “Companies like Cognichip are coming in to address a significant part of what fabless companies do in-house, but we’re creating a new segment called AI-enabled chip design, that will serve as a third party [between fabless companies and EDA companies].”

The problem Cognichip is trying to solve is the level of investment required to build a chip today, an issue that is drastically increasing the barriers to entry for chip startups.

“Depending on what kind of application you’re building, you could easily spend $200 or $300 million,” he said. “The runway to see if you built a successful product is also very long; it’ll take a couple of years to get something to first samples, and that’s if everything goes well and your team of experts is available from day one.”

Two years on, when you have first samples, they may still require revisions or respins. The time lag between conceiving a product and really testing its product-market fit can be as much as five years, Diamantidis said, noting that new software is typically adopted within weeks. This is hardly an ideal situation.

“Software can reach 100 million users in weeks, but it’s running on five-year-old hardware,” he said. “So if you ask me as a semiconductor person, what should I be designing now for 2030? I have no idea, and yet I’d be asking people to put $300 million behind that statement.”

This results in programmable designs which could have been more performant with more knowledge of future workloads, he said.

Current chip design stages were formalized in the 1990s, following a waterfall model that moves from abstraction to abstraction, optimizing locally before moving to the next stage. This process is rigid; there’s no opportunity to go back and reevaluate requirements or bring in new features, Diamantidis said.

The result is that fewer and fewer semiconductor startups are starting or completing the journey from seed to IPO than in the early 2000s, Diamantidis said, with most success going to larger companies that have large teams with experience and resources for efficient chip design.

“We’re looking to change all that,” he said. “We’re looking to make it easier for people to build chips with smaller teams, less retained expertise for lengthy periods of time, and with significantly less investment by tackling the design flow overall.”

Sources of data

Cognichip is taking on the semiconductor design cycle with its physics-informed foundation model built from the ground up for chip design. While it’s still to be determined whether a single foundation model will work for all verticals and technologies/design styles, industry trends in other domains are towards mixtures of more specialised models, Diamantidis said. This model, or models, will use the abstractions already used for chip design, from product definitions to GDS code to design chips at compute speed, rather than at designer speed. The eventual result will be the ability to do more with less – develop more chips, faster, with fewer people – lowering the barriers to entry for chip design.

The raw material for this AI foundation model is data.

“There are no easy or free answers [when it comes to chip design data],” Diamantidis said.

There is a growing amount of open-source data available, and if you know what you’re doing, it can offer some value, but it can be complex to keep track of licensing requirements, he said. This data is also available to builders of the big open-source LLMs, so using only this data, one could expect to develop a model with comparable chip design capabilities to open-source LLMs, he said.

Cognichip has assembled an internal team of chip designers to create proprietary chip design data and also has a sizable AI team to develop synthetic data to augment it. Synthetic data requires its own models to generate and evaluate, and of course, it’s critical to ensure the company has robust data governance policies to keep it separate from human-generated or open-source data.

Another significant source of data is licensing it from chip companies; alongside hiring and computing, this is another significant expenditure Cognichip is incurring against its $33 million seed funding. Licensing this data requires a variety of schemes, agreements, and structures – a substantial challenge the company is addressing carefully.

“That’s something we’ve learned how to do well, because it’s not just about knocking on someone’s door and saying, hey, can I use your data for training?” Diamantidis said. “It’s about building ecosystems and mutual value, so they will actually work with you, and building the technology to absorb that data and make it meaningful, because it can take years.”

One of Cognichip’s intentions is to level the playing field for companies that don’t have access to such data internally, like startups.

“Startups are conceptually at a disadvantage [versus bigger companies], but the disadvantage is not as high as going against a very powerful system of IDMs that own everything from concept to GDS,” Diamantidis said.

While big chip companies have relevant architecture and implementation data, this data is very application-specific (i.e., it’s GPU, application processor, or networking chip data), Diamantidis points out. This data is also based on other data that may have come from design tool algorithms, licensed IP, and foundry PDKs.

In any case, companies like Cognichip aim to grant startups access to a data ecosystem they can be part of.

Artificial chip intelligence

Cognichip is proposing “artificial chip intelligence” (ACI) and has carefully defined ten levels of AI-driven automation in chip design. Current advanced (but general) LLMs in the hands of an experienced chip designer can reach ACI level one, Diamantidis said.

“The industry needs a roadmap to ACI nine, which will be a multi-year roadmap,” he said.

ACI nine represents human-level cognitive abilities when solving chip design problems. Cognichip wants to put ACI nine models in front of designers to help them be significantly more effective.

“I think we will reach a point where anyone can design a chip, even if they have zero expertise,” Diamantidis said. “The reason I can say this is we have people here doing this! Our team has AI and chip design pedigree – the AI guys know nothing about chip design, but they have the capability to make designs of their own.”

Some of Cognichip’s AI designers have taken to working on chip designs in their spare time, with some producing “meaningfully complex” subsystems, if not entire chips, Diamantidis said.

“I’m not going to say that the art of chip design is going to disappear, it’s going to continue to be an art, there’s going to be a difference between the expert and the novice,” he said. “But that envelope is going to close quite significantly.”

Higher levels of ACI could lower the barrier to entry to chip design, not only for startups, but also for countries’ sovereign semiconductor industry efforts, he said, especially for designs that mainly use third-party IP (custom logic is harder).

Advanced AI-driven design will have further second- and third-order effects, Diamantidis expects; one of which could be more agility in the supply chain by making it easier to port designs between manufacturing process nodes.

From EETimes